Next generation wireless communication products are being designed with modem architectures capable of supporting many wireless protocols (communication modes). In order to minimize the cost, power, and size of these multi-mode modems, some of these architectures will be designed for increased software configurability with a minimized set of hardware resources necessary for implementing a set of wireless protocols. The general term Software Definable Radio (SDR) is often used for these new modem architectures.
Some of these new SDR architectures may have traditional Digital Signal Processors (DSPs) and newer Reconfigurable Logic Signal Processors (RLSPs). Both types of signal processing structures use hardware which is configured/controlled via software. However, the RLSP architectures have many parallel processing structures that are individually reconfigurable, in some cases by another processor. Each structure of a reconfigurable resource is configured when configuration data bits are loaded into the configuration registers of that structure. The combined set of configuration bits of all resources is analogous to a very large instruction word that may have hundreds, thousands or even tens of thousands or more bits in the word. These reconfigurable parallel processing resources are capable of performing a complex signal processing task in as little as one clock cycle. As such, they are well suited for data-path signal processing tasks such as CDMA (Code Division Multiple Access) chip rate processing. The structures are configured by loading a bit pattern, representing configuration data into the reconfigurable resources of the RLSP.
It is noted that the above software defined radio may be in an environment in which more than one wireless protocol or air interface (AI) standard may be present. The bit patterns which implement the processing of an air interface in the RLSP are stored in configuration storage memory. This memory can contain the bit patterns to enable processing of a number of air interfaces. The air interface which the RLSP processes in an SDR is defined by the current contents of the configuration registers in the RLSP. When an air interface is called into action, the bit pattern is copied from the configuration storage memory to the configuration registers. In some cases, more than one arrangement of the RLSP may be necessary to implement signal processing for an air interface, essentially time-sharing the reconfigurable hardware resources.
The RLSP is well suited to process the physical layer of a communications link. As noted previously, the configuration data is analogous to a very long instruction word. This configuration data may be susceptible to corruption by, for example, electrostatic discharge (ESD). The configuration data may also be the target of malicious activities and thus corrupted by a hacker. This can result in loss of security, communication failure or transmission outside legal boundaries of power, frequency, bandwidth, etc.